BUT Chips of Europe EU
Semiconductor wafer
Summer School 2026

Chip Design &
Semiconductor Technologies

Brno, Czech Republic
2–4 September (Virtual) | 7–11 September (On-site)
3 ECTS
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Design. Simulate. Fabricate.

Master the complete semiconductor development cycle from theory to fabrication

CMOS Technology Fundamentals

Review the basics of CMOS technology, physical principles of CMOS transistors, their modeling, and operating modes

Analog IC Building Blocks

Design of basic analog circuit structures: current mirrors, current and voltage references, differential pairs, and output amplifier stages

Cadence & Synopsys EDA Tools

Professional simulation and design tools for parameter extraction from SPICE models, circuit design, and verification

Cleanroom Wafer Processing

Hands-on experience with basic technological steps for manufacturing simple structures on silicon wafers at CEITEC BUT facilities

Electron Microscopy Analysis

Detailed analysis of structure and properties of semiconductor materials and devices at IPE FME

Blended Intensive Programme

A comprehensive learning experience combining theory and practice

Virtual Theoretical Module (2–4 September 2026)

Online lectures and specialized seminars led by academic staff from BUT and partner universities. Students will review CMOS technology basics, transistor physics, modeling, and operating modes. Topics include current mirrors, reference circuits, amplifiers, differential pairs, and output amplifier stages. This virtual part creates a unified professional foundation for all participants and prepares students for intensive design and laboratory work.

On-site Project-Based Learning (7–11 September 2026)

Practical design of a simple integrated circuit in CMOS technology. Students work in international teams using professional simulation and design tools (Cadence, Synopsys), applying knowledge gained during the virtual theoretical part. The program includes specialized laboratory exercises focused on technological and experimental aspects of microelectronics.

International Collaboration

Work in international teams of 2–3 members on a team project. The program brings together students and faculty from multiple European universities, fostering cross-cultural collaboration and knowledge exchange.

Program Schedule

Detailed timeline of virtual and on-site activities

Theory - Online Lectures (2–4 September 2026)

Day
9:00 – 11:30
12:30 – 15:30
Wednesday, September 2
Summer school opening - basic organization
Review of the basics of CMOS technology
Current mirrors
Thursday, September 3
Reference circuits
Amplifiers
Friday, September 4
Differential pair
Output amplifier stages
Simple operational amplifier

Practice - On-site at BUT (7–11 September 2026)

Day
9:00 – 11:30
12:30 – 15:30
15:30 – 19:00
Monday, September 7
Summer school opening - basic organization
Simulation software - Cadence and Synopsys
Review of the basics of CMOS technology
Current mirrors
Sightseeing tour around Brno city center
Tuesday, September 8
Reference circuits
Amplifiers
Laboratory sessions at IPE FME - electron microscopy
Laboratory sessions in clean rooms at CEITEC BUT - simple chip fabrication
Wednesday, September 9
Differential pair
Laboratory sessions at IPE FME - electron microscopy
Laboratory sessions in clean rooms at CEITEC BUT - simple chip fabrication
Thursday, September 10
Output amplifier stages
Simple operational amplifier - design and simulation
Brno dam trip and fun afternoon
Friday, September 11
Team project
Presentation of the team project
Conclusion of the summer school

Who Should Apply

01

MSc students (first year)

Graduate students in their first year pursuing advanced studies in microelectronics, electrical engineering, or related fields

02

Final-year BSc students

Undergraduate students in their final year with strong foundations in electronics and semiconductor physics

03

Microelectronics / semiconductor focus

Students with demonstrated interest and coursework in semiconductor technologies and integrated circuit design

20

Limited Availability

Only 20 international participants will be accepted

Ready to Shape the Future of Semiconductors?

Join us for an intensive learning experience that bridges theory and practice

Apply Now
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Registration deadline: To be announced